The present invention relates to semiconductor devices and methods of designing and manufacturing the same, and more particularly to device structures for setting a characteristic variation among a plurality of semiconductor devices based on stress distribution in a semiconductor element forming region originated in the existence of an oxide film forming an isolation region to a predetermined value or below in a highly integrated semiconductor device and a method of manufacturing the same.
In forming a conventional semiconductor device, a thermal oxide film of silicon (SiO.sub.2) has been used for the purpose of aiming at electrical insulation between adjacent devices. Since there is a difference in coefficients of linear expansion between the oxide film and a semiconductor substrate, i.e., silicon, and the thermal oxide film is produced at a high temperature in the vicinity of 1,000.degree. C., a thermal stress is generated in the semiconductor substrate and the thermal oxide film in the vicinity of room temperature. In particular, steep stress distribution (gradient) is generated in the vicinity of the boundary between both materials. Furthermore, the generated stress changes depending on the production temperature of the thermal oxide film, the oxide film thickness, the plane layout dimension or the like.
High integration of a semiconductor device is being expedited in recent years, but a trend to increase a circuit current or current density for improving a response speed of a device is shown in a high speed device in particular, thus requiring also to increase a required oxide film thickness for securing electrical insulation from an adjacent device. The film thickness of 0.5 .mu.m to 1.0 .mu.m has been heretofore sufficient, but it becomes necessary to secure the film thickness of 2 .mu.m or more as occasion demands. As a result, a spread region of a stress field (a stress distribution (gradient) forming region) formed in the vicinity of the boundary between the oxide film and the semiconductor region is also expanded. When a stress field is formed in a semiconductor region, variation is generated in various electrical characteristics of the circuit device.
There is a piezoresistance effect as a typical factor for variation. This phenomenon is one in which electrical resistivity of a semiconductor is varied when a stress (a strain) is generated in a semiconductor region. Thus, when a diffused resistor is formed in the region where the stress field is generated, the resistance value of the resistor is shifted from a designed value in accordance with the stress field. Since the variation of the resistance value of the resistor produces such a phenomenon that variation of an amplification factor in an amplifier circuit is caused, a resonance frequency is shifted in a resonance circuit and so on. Therefore, reliability is detracted by a large margin depending on the product.
As the integration of a semiconductor device (element) is accelerated and more complication of an element structure or more diversification of an element forming material is aimed at hereafter, a tendency that the increase of the stress inside the device (element) is unavoidable is shown, thus producing possibility of causing such a problem that the characteristic variation quantity is further increased and the variation quantity in characteristics of the element or the circuit becomes different depending also on the location in accordance with stress distribution generated inside the device. The measurement of residual stress after thermal oxidation of a silicon substrate is described in a literature, H. Miura et al., "Residual Stress Measurement in Silicon Substrates after Thermal Oxidation", Series A, Vol. 36, No. 3, July 1993, pp. 302-308.
When the characteristics of an element or a circuit change in a semiconductor device, such problems that the voltage amplification factor is lowered and a booster circuit becomes no longer operated, an error is generated in signal transmission and so on are generated. When the characteristics of the element or the circuit of the whole device vary uniformly, it is possible to control the variation by compensating for the characteristic variation or designing by taking the variation into consideration, but when the stress distribution is generated inside the device (semiconductor region) and characteristic variation becomes different depending on the location inside the device (semiconductor region), compensation for characteristic variation becomes very difficult.
Accordingly, since the increase of the film thickness of the oxide film for electrical insulation enlarges the stress distribution (gradient) generating region in the vicinity of the boundary between the oxide film and the semiconductor region, and spreads the characteristic variation region of the element or the circuit, a useless region where no circuit is formed becomes necessary in order to assure the product reliability, thus requiring to make the dimensions of the device (semiconductor chip) larger. This fact gives rise to a problem of substantially impeding miniaturization and high integration of the device.